This invention relates to an interruption mechanism for a data processing system.
Such an interruption mechanism is proposed in a publication entitled "IBM System/370 Extended Architecture-Principles of Operation", Chapter 2: pp. 2-3, March issue, 1983. In the proposed mechanism, a number of pairs of old-PSW (old-program status word) and new-PSW locations are assigned in a real storage. When an interruption occurs, previously determined addresses for designating the pair of new-PSW and old-PSW corresponding to the type of the interruption are selected by hardware. The current-PSW is then stored in the corresponding old-PSW location of the storage. The Central Processing Unit (CPU) fetches a new PSW from a storage location designated by the hardware followed by the execution of an interruption program is executed.
This system, however, presents a problem that the old and new PSW pair occupies the fixed locations in the storage. As a result, an address change tends to become difficult. Another difficulty caused by the system is that since only the above-mentioned pairs of old and new PSW's can be saved and reloaded by hardware and the area of their storage locations cannot be changed, software must be used for saving and reloading data of a CPU status other than PSW's, for instance, the contents of a general register to and from a different location of the storage.